查人人中国名人网李佳薇百度云:organized entry pairs
来源：百度文库 编辑：查人人中国名人网 时间：2024/05/06 01:59:36
• 175 MHz/227 MIPS 4Kc CPU with an embedded cache, 8K-byte I-cache and 8K D-cache
• An embedded memory management unit (MMU) 32-entry TLB (Translation Lookaside Buffer), with 16 organized entry pairs
• IEEE 802.3 Fast Ethernet 5 auto-MDIX (auto-crossover) twisted paired LAN interfaces with embedded 10/100M PHY and 1 GMII/MII* interface
• Flexible WAN port selection and embedded switch engine and Data-buffer/Address-look-up table
• Look-up table read/write-able
• MAC layer security and clone solution
• Internet Group Management Protocol (IGMP) multicasting
• MAC filtering, Bandwidth control and a Class of Services (CoS) with two priority levels
• Shared dynamic data buffer management with embedded SSRAM
大家帮个忙，我不是学习计算机的，现在要翻译这些东西，简直要杀死我的感觉，请大家帮帮翻译翻译
• An embedded memory management unit (MMU) 32-entry TLB (Translation Lookaside Buffer), with 16 organized entry pairs
• IEEE 802.3 Fast Ethernet 5 auto-MDIX (auto-crossover) twisted paired LAN interfaces with embedded 10/100M PHY and 1 GMII/MII* interface
• Flexible WAN port selection and embedded switch engine and Data-buffer/Address-look-up table
• Look-up table read/write-able
• MAC layer security and clone solution
• Internet Group Management Protocol (IGMP) multicasting
• MAC filtering, Bandwidth control and a Class of Services (CoS) with two priority levels
• Shared dynamic data buffer management with embedded SSRAM
大家帮个忙，我不是学习计算机的，现在要翻译这些东西，简直要杀死我的感觉，请大家帮帮翻译翻译